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Superconducting Quantum Computer Architecture

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QH-2026F v5 · 16-Week Overview
T2 Outlook · From Artificial Atoms to Protected Qubits | QH-2026F v5
Week 2 · Superconducting-Circuit Quantization and Transmon Design | QH-2026F v5
Week 2 Slides · Superconducting-Circuit Quantization and Transmon Design | QH-2026F v5
Week 3 · Fluxonium: From Circuit Modification to Design Trade-offs | QH-2026F v5
Week 1 Manual Slides · From Quantum Computing Models to Hardware Operations | QH-2026F v5
Week 2 Manual Slides · Superconducting-Circuit Quantization and Transmon Design | QH-2026F v5
Week 3 Manual Slides · Fluxonium and Protected-Qubit Hamiltonian Engineering | QH-2026F v5
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PHYS598500 · Week 1 · T1

From Quantum Computing Models to Hardware Operations

From Quantum Computation Models to Hardware Operations

Week Overview

Course Duration:120 minutes

Core Question:How does a step in a quantum algorithm ultimately become a controllable, measurable hardware operation?

Difficulty:Prerequisite integration / cross-layer orientation

Prerequisites:Linear algebra, introductory quantum mechanics, and basic logic gates

Original Source Material:T1 modules 1, 2, 3, 4, 5, 6, 7

Learning Outcomes

  • Build a cross-layer map from algorithm → logical operation → unitary → Hamiltonian → waveform → measurement.
  • Understand why closed-system quantum evolution is unitary and reversible, and distinguish the roles of measurement and reset.
  • Identify the new resources, control degrees of freedom, and failure modes introduced at each abstraction layer.

120-Minute Session Plan

TimeFormatContent and Deliverable
0–10 minOrientation / diagnosticWhat does a step in a quantum algorithm actually require the hardware to do?
Use one question to check prerequisites and establish this week's interfaces.
10–35 minConceptual throughline AWhy must closed-system quantum evolution be unitary and therefore reversible?
Establish the first set of physical concepts, variables, and engineering language.
35–60 minDerivation / quantitative analysisHow does a logical gate become a decomposable unitary operation?
Complete the key derivation or quantitative relation instead of stopping at terminology.
60–70 minBreakBreak
Preserve an attention-recovery interval within the two-hour class.
70–95 minConceptual throughline BHow is a unitary operation generated by a time-dependent Hamiltonian?
Connect the physical result to components, control, or system architecture.
95–110 minCase study / discussionWhere do measurement, reset, and classical feedback connect to the unitary chain?
Students leave a checkable diagram, table, derivation, or architecture decision.
110–120 minSynthesis / assessmentAcross which abstraction layers will later weeks track errors and resources?
Use an exit question to check whether students can explain across layers.

Total: 120 minutes

Extended teaching-preparation library · Select by the six questions

Week 1 Extension: From a “Function” to Controllable Physical Evolution

This week is not another review of introductory quantum information. It establishes the cross-layer language that the rest of the course will repeatedly use. By the end, students must be able to follow one question downward: What function do we want to compute? How is that function embedded in a reversible map? How is the reversible map represented as a unitary circuit? How is that unitary realized by an actual time-dependent Hamiltonian, control waveforms, and a measurement chain? Omitting any layer makes it easy to mistake “the abstract algorithm can be written down” for “the hardware can already execute it reliably.”

The Landauer principle, Bennett reversible computation, and the adiabatic model are retained below as extended preparation material. The scheduled throughline uses only six core questions to establish the interfaces algorithm → unitary → Hamiltonian → control → measurement; Week 1 need not exhaust every model of computation.

How to Use This Material

“Board derivation” marks content that should actually be worked through; “class activity” requires time for student writing or discussion; “instructor answer” resolves layers students commonly confuse. If preparation is weaker, reduce the complexity-theory extension, but do not remove reversible embedding or the logical-to-physical chain: those are the essential interfaces for this week.

Q1. What Does an Algorithmic Step Ask the Hardware to Do?

Semantics, Representation, and Physical Realization

0–10 minutes

1. Opening Diagnostic: Computation Does Not Float Outside the Physical World

Begin with a seemingly simple operation: input two bits and output their AND, \(f(a,b)=a\land b\). Mathematically it is only a four-row truth table; in a program it may be only one operator. In a real device, however, we must also specify which degrees of freedom carry the inputs, how the system evolves, when the output is read, where heat and noise flow, and whether the same operation can be repeated within a finite error budget.

“Computation” therefore contains at least three kinds of questions. First, thesemantic question: which inputs should correspond to which outputs? Second, therepresentation question: do we encode the task using bits, qubits, registers, circuits, or a Hamiltonian? Third, theimplementation question: which physical system and control procedure actually generate the required transformation? These layers can be mapped to one another, but they cannot simply be equated.

Opening Prompt: Three Minutes of Individual Writing, Two Minutes of Class Synthesis

A NAND gate can generate any Boolean function. Why, then, can we not simply say, “NAND is universal, so a quantum computer only needs to implement NAND”? Identify at least one mathematical obstacle and one physical obstacle.

Instructor Answer

The mathematical obstacle is that NAND is a many-to-one map: output 0 corresponds to three possible inputs, so the input cannot be uniquely recovered from the output and the map cannot directly be the unitary evolution of a closed quantum system. The physical obstacle is that a correct truth table still specifies neither energy levels, coupling, pulses, dissipation, nor measurement. This does not mean that a quantum computer cannot compute NAND; it means that NAND must beembedded in a larger reversible map, such as \((a,b,c)\mapsto(a,b,c\oplus ab)\), and then realized by controllable physical evolution.

The Full Chain for This Week

\[ f(x)\ \longrightarrow\ U_f:\ket{x,y}\mapsto\ket{x,y\oplus f(x)} \ \longrightarrow\ \{G_1,G_2,\ldots,G_m\} \ \longrightarrow\ H(t) \ \longrightarrow\ \text{control waveform} \ \longrightarrow\ \text{measurement record}. \]

The arrows are not repeated synonyms. Crossing each layer introduces different design freedoms and failure modes.

Q2. How Do Boolean Maps Become Reversible and Unitary?

From Permutations to Hamiltonian Evolution

10–35 minutes

2. Representation, Transformation, and Physical Realization: Four Computational Descriptions Must Not Be Confused

2.1 Boolean Map: Specifying Only Inputs and Outputs

A Boolean function is \(f:\{0,1\}^n\to\{0,1\}^m\). It tells us which bit strings map to which outputs, but it specifies neither execution order, temporary storage, energy cost, nor hardware. For example, the truth table of \(f(a,b)=a\land b\) is:

\(a\)\(b\)\(a\land b\)Can the input be recovered from the output?
000No: three inputs merge into the same output
010
100
111Only this row is distinguishable

When domain and codomain have the same size, a reversible function on a finite set must be a permutation: every input has one output, and every output has exactly one preimage. NOT swaps two states and is therefore reversible; AND, OR, and NAND discard input information and are not permutations.

2.2 Reversible Circuit: Retaining Enough Information to Make the Map One-to-One

CNOT acts as \((a,b)\mapsto(a,a\oplus b)\). Applying CNOT a second time restores the input, so \( \mathrm{CNOT}^{-1}=\mathrm{CNOT}\). The Toffoli gate acts as:

\[ T(a,b,c)=(a,b,c\oplus ab). \]

When the third bit is initialized to \(c=0\), its output is exactly \(ab\), while \(a,b\) are not erased. Toffoli does not “compress two inputs directly into one AND output.” It preserves the inputs in a larger state space and writes AND into the target bit. That extra space is not decorative formalism; it is the cost of reversible embedding.

Input \((a,b,0)\)Toffoli outputThird bit
0000000
0100100
1001000
1101111

2.3 Unitary Circuit: Extending a Permutation to a Linear Space of Complex Amplitudes

A classical reversible gate permutes the computational basis; a quantum gate must act linearly on every superposition while preserving inner products. If \(U^\dagger U=I\), then for any \(\ket{\psi},\ket{\phi}\):

\[ \langle U\psi\vert U\phi\rangle =\langle\psi\vert U^\dagger U\vert\phi\rangle =\langle\psi\vert\phi\rangle. \]

Norm, orthogonality, and distinguishability are therefore preserved. If two orthogonal inputs were sent to the same output, their output inner product would change from 0 to 1, violating unitary preservation of the inner product. This is the precise reason a many-to-one Boolean gate cannot directly serve as a quantum gate.

2.4 Hamiltonian Evolution: The Device Must Still Be Able to Generate the Unitary

An abstract circuit divides evolution into \(U=G_m\cdots G_2G_1\); a real closed system is governed by the Schrödinger equation:

\[ i\hbar\frac{d}{dt}\ket{\psi(t)}=H(t)\ket{\psi(t)}, \qquad U(t)=\mathcal T\exp\!\left[-\frac{i}{\hbar}\int_0^tH(\tau)d\tau\right]. \]

Specifying \(U\) is not the same as specifying \(H(t)\). The same logical gate can be realized with different pulse shapes, frames, coupling mechanisms, and durations, which produce different leakage, decoherence, crosstalk, and calibration burdens. Later discussions of the transmon, microwave control, and readout will repeatedly return to this distinction.

2.5 Resource Questions Begin Only After Reversible Embedding

Writing an irreversible function as \(U_f\) proves only that a reversible representation exists; it does not say that representation is cheap. Suppose a classical program contains many intermediate variables \(g_1(x),g_2(x),\ldots\). The most direct reversible simulation retains the history of every step, so space can grow with execution time. Frequent uncomputation recycles ancillas but increases circuit depth. A space–time trade-off therefore appears immediately: retaining more work registers can avoid recomputation, while aggressively cleaning registers saves qubits at the cost of extra gates.

Fault-tolerant quantum computing amplifies this trade-off. A logical qubit is not one physical qubit, and a non-Clifford operation can cost far more than a Clifford gate. Consequently, saying that two algorithms both have polynomial complexity is not enough to determine which can be implemented first. A practical resource estimate must track logical qubits, T count, T depth, connectivity, error-correction cycles, and the allowed failure probability. This hardware course will not complete fault-tolerant costing in Week 1, but from this point onward it will not treat ancillas and abstract gates as free symbols.

Mini-Example: Two Resource Accounts for the Same Function

Suppose we compute \(g=a\oplus b\) followed by \(h=g\land c\). Plan A retains \(g\) until the end, requiring one workspace bit but no recomputation. Plan B uncomputes \(g\) immediately after use; if \(g\) is needed again, two CNOTs must be reapplied. Both plans compute the same output function, yet they differ in peak workspace, total gate count, and error exposure. When students later encounter compiler optimization, they should first ask which cost function is actually being minimized.

Class Activity: Classify Instead of Memorizing Terms (5 minutes)

Classify each statement as “semantics / reversible logic / unitary circuit / physical control”: (1) evaluate \(f(x)\); (2) add an ancilla to preserve the input; (3) decompose the operation into CNOTs and single-qubit rotations; (4) execute \(X_{\pi/2}\) with a 20 ns microwave pulse; (5) threshold a resonator IQ point as 0 or 1. Then identify the two steps most easily hidden by software simulation.

Instructor Answer

In order: semantics, reversible logic, unitary circuit, physical control, and measurement plus classical post-processing. Steps four and five are most easily concealed by abstract simulation, but the ancillas and garbage management in step two also change qubit count and circuit depth directly and cannot be treated as free resources.

Q3. What Do Landauer and Bennett Tell Us about Reversibility?

Information Erasure, Resources, and Uncomputation

35–60 minutes

3. From Information Erasure to Reversible Computation: Landauer and Bennett Solve Different Problems

3.1 Why Reset Is the Key Issue, Rather Than the Power Consumption of a Particular Transistor

Consider a memory bit whose initial values 0 and 1 each occur with probability one half. For this ensemble, the Shannon entropy is:

\[ H(X)=-\sum_xp(x)\log_2p(x) =-\frac12\log_2\frac12-\frac12\log_2\frac12 =1\ \text{bit}. \]

After RESET-TO-0, both initial states enter 0, so the output distribution becomes \(p(0)=1,p(1)=0\) and the information entropy falls to zero. From the perspective of the memory subsystem, one bit of information has been lost. If the total system obeys the second law, this entropy reduction cannot disappear without cost; in the quasistatic, isothermal, idealized limit, the environment must receive at least:

\[ \Delta S_{\mathrm{env}}\ge k_B\ln 2, \qquad Q_{\min}=T\Delta S_{\mathrm{env}}\ge k_BT\ln2. \]

This lower bound does not mean that “every logic gate must dissipate exactly \(k_BT\ln2\).” Real CMOS switching energy is usually far larger; reversible logic can also consume energy through finite-speed operation, damping, leakage current, and control errors. The Landauer principle makes the more precise statement that:logically irreversible information erasure has a minimum thermodynamic cost that cannot be eliminated merely by improving engineering efficiency.。

Worked Example A: The Landauer Bound at 300 K and 10 mK

Take \(k_B=1.380649\times10^{-23}\,\mathrm{J/K}\). At room temperature, \(T=300\,\mathrm K\):

\[ Q_{\min}=k_BT\ln2 \approx(1.380649\times10^{-23})(300)(0.693) \approx2.87\times10^{-21}\,\mathrm J. \]

For a hypothetical thermal bath at \(T=10\,\mathrm{mK}\) in a dilution refrigerator, the formal lower bound becomes approximately \(9.57\times10^{-26}\,\mathrm J\). This does not imply that “the total energy consumption of a low-temperature quantum computer must be tiny.” A real system also includes room-temperature microwave electronics, attenuation chains, amplifiers, a cryocooler, and the refrigerator coefficient of performance. The Landauer bound is a theoretical lower bound on information erasure, not a formula for estimating total machine power.

3.2 Logical Reversibility Is Not Thermodynamic Reversibility

Logical reversibility asks whether the input can be uniquely recovered from the output. Thermodynamic reversibility asks whether the entire physical process can make total entropy production approach zero in the quasistatic limit. The former is a property of a map; the latter is a property of a trajectory and its dissipation. A reversible truth table can still dissipate substantial energy when switched rapidly with strong damping. Conversely, an extremely energy-efficient irreversible gate does not remove the theoretical lower bound associated with reset.

This distinction is especially important for quantum hardware. Schrödinger evolution of a closed system is unitary, but an experimental device must initialize, measure, reset, perform classical feedback, and continually exchange energy with its environment. “Quantum evolution is reversible” does not imply that “an entire quantum computer has no dissipation.”

3.3 Erasing a Biased Bit: The Cost Is Not Always Exactly One Bit

If the memory contains 1 with probability \(p\) and 0 with probability \(1-p\), its initial Shannon entropy is the binary entropy:

\[ H_2(p)=-p\log_2p-(1-p)\log_2(1-p). \]

After an ideal reset, the entropy is zero, so the minimum environmental entropy increase corresponds to \(k_B\ln2\,H_2(p)\). At \(p=1/2\), this reduces to \(k_B\ln2\). As \(p\to0\) or \(1\), the ensemble is already almost known and the theoretical lower bound approaches zero. Thus the Landauer cost depends on the amount of information discarded, not on mechanically multiplying every circuit symbol by a fixed constant.

Likewise, if a reset protocol knows the input distribution, its energy landscape can be biased to approach a lower average work. If the controller does not know the individual microstate, it must still account for the ensemble. The key issue is the condition connecting logical information to thermodynamic entropy, not a blanket identification of Shannon entropy with thermodynamic entropy in every situation.

3.4 Bennett's Compute–Copy–Uncompute Procedure

If a sequence of classical computations directly overwrites intermediate registers, the old information is discarded. Bennett's central method is to rewrite every step as reversible evolution and temporarily retain the history; after obtaining the result, copy it into a clean register, then run the original computation backward to restore the workspace to its initial state:

  1. Compute:\((x,0,0)\mapsto(x,g(x),f(x))\)。
  2. Copy:\((x,g,f,0)\mapsto(x,g,f,f)\). A classical basis state can be copied with CNOT; this is not the copying of an unknown quantum state.
  3. Uncompute:Apply \(U_f^{-1}\) to the first three registers to obtain \((x,0,0,f(x))\).

Only the required input and output remain; temporary garbage returns to a standard state and can be reused. The cost is extra space, additional circuit depth, and the need for sufficiently accurate inverse operations. This idea remains part of the basic syntax of quantum-algorithm design: if oracle, ancilla, and arithmetic circuits are not uncomputed, garbage becomes entangled with the answer and damages later interference.

Worked Example B: Compute \(f(a,b)=a\oplus b\) and Clear the Temporary Garbage

Prepare four bits \((a,b,g,y)\), with \(g=0,y=0\). First write the parity into \(g\) using two CNOTs:

\[ (a,b,0,0) \xrightarrow{\mathrm{CNOT}_{a\to g}} (a,b,a,0) \xrightarrow{\mathrm{CNOT}_{b\to g}} (a,b,a\oplus b,0). \]

Next copy \(g\) to output \(y\): \((a,b,a\oplus b,0)\to(a,b,a\oplus b,a\oplus b)\). Discarding \(g\) at this point would erase information. The correct procedure is to run the original two CNOTs in reverse:

\[ (a,b,a\oplus b,a\oplus b) \xrightarrow{\mathrm{CNOT}_{b\to g}} (a,b,a,a\oplus b) \xrightarrow{\mathrm{CNOT}_{a\to g}} (a,b,0,a\oplus b). \]

The output remains while the work bit returns to 0. Because CNOT is self-inverse, the reverse circuit is easy to see in this example; for a general \(U\), every \(G_i^{-1}\) must be applied in the opposite order.

Class Activity: Build a Clean AND Oracle (7 minutes)

Use a Toffoli to compute \(ab\), together with a separate output bit \(y\). Draw compute, copy, and uncompute stages that leave the final state \((a,b,0,y\oplus ab)\). Label each register as input, workspace, or output.

Instructor Answer and Follow-Up

First apply \(T_{a,b\to g}\) to obtain \(g=ab\), then use CNOT\(_{g\to y}\) to write into \(y\), and finally apply Toffoli again to clear \(g\). Ask why \(g\) cannot simply be reset: reset erases information correlated with the input, and for a quantum superposition, reset or trace-out also destroys coherence. Then ask why copying does not violate the no-cloning theorem: CNOT copies only a classical label in the specified computational basis; an unknown superposition generally produces an entangled state, not two independent copies of \(\ket{\psi}\).

Board Summary: Three Statements That Must Not Be Confused

  1. A general irreversible function can be embedded in a reversible function, but the ancillas, depth, and garbage required by the embedding are not free.
  2. Logical reversibility can avoid the unavoidable lower bound of information erasure, but it does not make a real device automatically dissipation-free.
  3. The unitarity of quantum gates is compatible with Bennett reversible computation, but initialization, measurement, and feedback in a quantum computer are still open-system processes.
60–70 minutes

Break and Board Content to Retain

Keep \(f(x)\to U_f\to G_i\to H(t)\) and compute–copy–uncompute on the board. After the break, do not restart with basic terminology; ask directly: if a unitary can evolve states only one-to-one, why does measurement appear to produce a many-to-one classical outcome?

Q4. How Do Unitary Dynamics, Measurement, and Computation Models Connect?

Gate-Based and Adiabatic Views of Physical Evolution

70–95 minutes

4. Interfaces among Unitary Evolution, Measurement, the Gate Model, and the Adiabatic Model

4.1 Why Closed-System Evolution Is Reversible

If \(H(t)=H^\dagger(t)\), the propagator \(U(t)\) generated by the Schrödinger equation satisfies \(U^\dagger U=I\). For a time-independent Hamiltonian, \(U(t)=e^{-iHt/\hbar}\), whose inverse is \(U(-t)=U^\dagger(t)\). This mathematical property means that the information in the complete pure state is retained in complex amplitudes. It does not guarantee that we know those amplitudes experimentally, nor that the environment has not carried away phase information.

For a single qubit, suppose the control Hamiltonian is:

\[ H=\frac{\hbar\Omega}{2}\sigma_x, \qquad U(t)=\cos\frac{\Omega t}{2}I-i\sin\frac{\Omega t}{2}\sigma_x. \]

Choose \(t=\pi/\Omega\). Then \(U=-i\sigma_x\), which is an \(X\) gate up to a global phase. This derivation connects the abstract \(X\) to an actionable parameter \(\Omega t\). If the pulse area is not \(\pi\), the drive detuning is nonzero, or other levels participate, the actual \(U\) departs from the ideal gate.

4.2 Measurement Is Not “Just Another Ordinary Unitary Gate”

A projective measurement is described by projectors \(\{P_m\}\). For a density matrix \(\rho\), the probability of outcome \(m\) and the corresponding conditional state are:

\[ p(m)=\operatorname{Tr}(P_m\rho),\qquad \rho_m=\frac{P_m\rho P_m}{p(m)}. \]

If the measurement record is ignored, the nonselective system state becomes \(\rho'=\sum_mP_m\rho P_m\). This is a completely positive trace-preserving map, but it is generally not unitary on the system Hilbert space. Measuring \(\ket{+}=(\ket{0}+\ket{1})/\sqrt2\) in the \(Z\) basis and forgetting the result changes a pure state with off-diagonal coherence into:

\[ \rho'=\frac12\ket{0}\bra{0}+\frac12\ket{1}\bra{1}. \]

If the system, apparatus, and environment are combined into a larger closed system, the measurement interaction can still first be described by unitary entanglement, for example \(\ket{0}\ket{A_0}\to\ket{0}\ket{A_0'}\) and \(\ket{1}\ket{A_0}\to\ket{1}\ket{A_1'}\). The apparently irreversible part arises because we retain only a subsystem, read a classical record, or ignore the environment. This directly echoes the first half of the class: preserving information requires enlarging the state space.

Concept Check (4 minutes)

Someone claims: “Quantum mechanics is unitary, so after measurement the measured qubit alone can completely reverse its premeasurement superposition.” Identify the error. The answer must mention the system boundary rather than merely writing “collapse.”

Instructor Answer

The measurement record is already correlated with the apparatus and environment. Acting only on the measured qubit generally cannot recover phase information distributed among other degrees of freedom. Discussing global reversibility would require control of the complete state, including apparatus and environment, which is normally impossible after readout. The point is not to declare vaguely that “the laws of nature are irreversible”; it is to explain why the chosen subsystem channel is no longer unitary.

4.3 Gate Model: Discrete Instructions Still Hide Continuous-Time Evolution

The gate model organizes an algorithm using registers, a gate sequence, and measurement. A universal gate set means that any target unitary can be approximated to the desired accuracy by a finite gate set; it does not mean that the hardware needs only one kind of component. On a superconducting platform, single-qubit rotations, two-qubit entangling interactions, virtual frame updates, readout, and reset have entirely different control paths.

From the compilation perspective, a logical circuit is first decomposed into a native gate set. From the control perspective, each native gate is then translated into a flux or microwave waveform. Conceptually:

\[ H(t;\theta) =H_0+\sum_k u_k(t;\theta)H_k, \]

Here \(H_0\) is the drift Hamiltonian, \(H_k\) are controllable couplings, \(u_k(t)\) are waveforms, and \(\theta\) contains amplitude, phase, frequency, duration, and envelope. Calibration adjusts \(\theta\) so that the actual propagator \(U(\theta)\) approaches the target gate while suppressing leakage, crosstalk, and sensitivity.

4.4 Adiabatic Computation: Representing Computation by a Ground-State Path

A different description does not apply gates in sequence; it designs a family of Hamiltonians:

\[ H(s)=(1-s)H_{\mathrm{init}}+sH_{\mathrm{problem}}, \qquad s=t/T\in[0,1]. \]

The system is first prepared in an easily accessible ground state of \(H_{\mathrm{init}}\). If the evolution is sufficiently slow and a nonzero spectral gap from the excited states is maintained along the path, the final state ideally remains close to the ground state of \(H_{\mathrm{problem}}\). Roughly speaking, the required time is highly sensitive to the minimum gap \(\Delta_{\min}\); a common adiabatic condition has the form:

\[ T\gg \max_s\frac{ \left\ket{\langle1(s)\vert\partial_sH\vert0(s)}\right| }{\Delta(s)^2}. \]

This is not a universal assumption-free equality. It reminds the engineer that the problem includes not only the final Hamiltonian but also the entire path, the minimum gap, initialization, thermal excitation, and the control schedule. If the gap shrinks rapidly with system size, “evolving slowly” may require an unacceptable amount of time.

4.5 Equivalent Computational Power Does Not Imply Equivalent Engineering Cost

The result of Aharonov and collaborators shows that the standard circuit model and adiabatic quantum computation can simulate each other with polynomial overhead under appropriate conditions. This is equivalence at the computational-model layer; it does not mean that the devices have identical coherence demands, coupler topology, control bandwidth, temperature, calibration, or noise susceptibility.

Comparison DimensionGate modelAdiabatic/Hamiltonian model
Program RepresentationDiscrete gate sequenceContinuous Hamiltonian path
Key Resourcesgate count、depth、fidelityminimum gap、schedule、path control
Primary Error Languageover/under rotation、dephasing、leakagenon-adiabatic transition、thermal excitation、control distortion
Final ReadoutMeasurement at the end of or during the circuitFinal energy / bit-configuration measurement
Hardware QuestionNative gates and calibrationProgrammable couplings, the gap, and the annealing schedule

When studying a computational model, ask “which problems can be computed efficiently?” When studying hardware architecture, ask “which control degrees of freedom must be exposed to realize that model under finite noise and resource constraints?” The questions are connected, but their evaluation metrics differ.

Worked Example C: How an Avoided Crossing Determines Adiabatic Difficulty

Consider the simplified two-level model:

\[ H(s)=A(1-2s)\sigma_z+B\sigma_x. \]

Its instantaneous energies are \(E_\pm(s)=\pm\sqrt{A^2(1-2s)^2+B^2}\), with energy gap:

\[ \Delta(s)=E_+-E_-=2\sqrt{A^2(1-2s)^2+B^2}. \]

The minimum gap occurs at \(s=1/2\), giving \(\Delta_{\min}=2|B|\). Halving the transverse coupling \(B\) halves the gap. Because the adiabatic timescale is often sensitive to \(1/\Delta_{\min}^2\), the required time can grow by roughly a factor of four. This example shows that even when the final problem Hamiltonian is unchanged, altering only the intermediate coupling path can drastically change implementation cost.

Longer evolution is not always better. Moving too quickly produces nonadiabatic transitions; moving too slowly gives thermal excitation, dephasing, and low-frequency noise more time to act. The real optimum is a joint result of open-system dynamics, temperature, gap, and schedule—not a monotonic rule that “slower is always better.”

Board Summary for This Section

\text{model equivalence} \not\Rightarrow \text{identical physical resource} \not\Rightarrow \text{identical engineering difficulty}.

Q5. How Does a Logical Requirement Become a Hardware Experiment?

Compilation, Control, Readout, and Validation

95–110 minutes

5. Complete Case Study: Taking \(f(a,b)=ab\) from a Logical Requirement to Superconducting Hardware

The first four sections established the languages of functions, reversible embedding, unitaries, and Hamiltonians. We now connect these layers into one engineering chain. AND is chosen deliberately because it is simple, not because real quantum algorithms only perform AND. It is sufficient to expose the new question introduced at every layer. If a three-qubit example cannot be described clearly across layers, a larger algorithm will merely hide interface problems behind more gates.

5.1 Requirement Layer: First Specify Which Outputs Must Be Retained

The original requirement is to compute \(ab\) from two classical input bits \(a,b\). If we write only \(f:\{0,1\}^2\to\{0,1\}\), the output has one bit and the map is irreversible. The quantum version is first rewritten as:

\[ U_f\ket{a,b,y} =\ket{a,b,y\oplus ab}. \]

When \(y=0\), the third register receives the answer; when \(y=1\), it receives the complement of the answer. Retaining \(a,b\) and using XOR are not superfluous formalities: they make the eight computational-basis states undergo a one-to-one permutation. At this point \(U_f\) is exactly the Toffoli gate. Its matrix is an \(8\times8\) permutation matrix and is therefore naturally unitary.

First Interface Check

If a requirement document says only “output AND,” the compiler still does not know whether the inputs must be preserved, how the output register is initialized, whether ancillas must be restored, or whether measurement-based cleanup is acceptable. These choices change qubit count, depth, and reusability. A logical specification must at least state the register contract.

5.2 Circuit Layer: Toffoli Is Not a Single Hardware Button

An abstract circuit diagram can contain one CCX symbol, but most platforms do not provide an ideal three-body interaction as a native instruction. The compiler must decompose it into single-qubit rotations and two-qubit entangling gates. A common exact decomposition uses Hadamard, \(T=R_z(\pi/4)\), \(T^\dagger\), and several CNOTs; if only a particular relative phase is required, a shorter relative-phase Toffoli may be used. The two versions can appear to have the same truth table on the computational basis while acting differently on the phases of a superposition, so a classical truth table alone cannot validate them.

The compiler therefore needs to know how the output will be used. If measurement immediately follows CCX, some phase freedom may be exploitable. If CCX appears inside an interference circuit, an untracked relative phase directly changes the answer. This is the difference between “semantic similarity” and “full unitary equivalence.”

Suppose the chip's native set consists of virtual \(R_z(\theta)\), microwave \(X_{\pi/2}\), and one calibrated \(CZ\). The compilation chain can be conceptualized as:

\[ \mathrm{CCX} \longrightarrow \{H,T,T^\dagger,\mathrm{CNOT}\} \longrightarrow \{R_z(\theta),X_{\pi/2},CZ\} \longrightarrow \{u_k(t)\}. \]

The second arrow uses a basis conversion such as \(\mathrm{CNOT}_{c,t}=H_tCZ_{c,t}H_t\); \(H\) can in turn be composed from \(R_z\) and \(X_{\pi/2}\). A real compiler also inserts routing according to the coupling graph, merges adjacent rotations, cancels inverse gates, and accounts for the pulse-level schedule. Logical depth, native two-qubit depth, and wall-clock duration are therefore three distinct quantities.

5.3 Device Model: Writing the Qubits and Coupling into the Hamiltonian

Two weakly anharmonic transmons can be described by a truncated Duffing-oscillator model:

\[ \frac{H_0}{\hbar} =\sum_{i=1}^{2} \left[ \omega_i b_i^\dagger b_i +\frac{\alpha_i}{2}b_i^{\dagger2}b_i^2 \right] +g\left(b_1^\dagger b_2+b_1b_2^\dagger\right). \]

Here \(\omega_i\) is the qubit transition frequency, \(\alpha_i<0\) is the anharmonicity, and \(g\) is the exchange coupling. Treating each transmon as a perfect two-level system misses leakage channels such as \(\ket{2}\); retaining too many levels rapidly increases simulation cost. Model order is itself an engineering trade-off.

A single-qubit microwave drive can be written as:

\[ \frac{H_d(t)}{\hbar} =\Omega(t)\cos(\omega_dt+\phi) \left(b+b^\dagger\right). \]

In the rotating frame and under the rotating-wave approximation, the amplitude, phase, and duration of a resonant drive determine the Bloch-sphere rotation axis and angle. An ideal \(X_{\pi/2}\) requires a calibrated pulse area. A pulse that is too short may cause leakage through spectral broadening; one that is too long increases exposure to decoherence. Realizing a two-qubit \(CZ\) depends on device architecture: it may use flux tuning near an avoided crossing, a tunable coupler, or another conditional-phase mechanism. The instruction “apply CZ” does not determine a unique waveform.

Estimation Example: How Does Gate Fidelity Accumulate through a Circuit?

Suppose one CCX decomposition requires six two-qubit gates and nine physical single-qubit pulses, while virtual \(R_z\) is provisionally treated as a zero-duration frame update. If the average two-qubit fidelity is \(F_2=0.99\), the single-qubit fidelity is \(F_1=0.999\), and errors are very crudely assumed to be independent and stochastic, the gate-only success fraction is approximately:

\[ F_{\mathrm{rough}}\approx F_2^6F_1^9 =0.99^6\times0.999^9\approx0.933. \]

This is not a rigorous process-fidelity prediction because it ignores coherent errors, correlated noise, crosstalk, SPAM, and compiler cancellation. It does, however, make one point clear: a logical specification containing one CCX does not imply a hardware cost of “one gate.” If two-qubit fidelity improves to 0.995 with all other assumptions unchanged, the crude estimate rises to about 0.962. Improving the most expensive primitive often has more system-level impact than fine-tuning an already high single-qubit fidelity.

5.4 Control, Calibration, and Readout: The Real Output Is Data, Not a Ket

Control electronics convert a gate schedule into digital waveforms, which travel through DACs, mixers, cables, and the cryogenic chain to the chip. The waveform at the qubit is not identical to the AWG file: frequency response, delay, attenuation, reflection, and crosstalk all modify it. Calibration uses measurement data to infer and update amplitude, frequency, phase, duration, and compensation parameters; it is not a one-time calculation that remains valid forever.

After the circuit runs, the readout-resonator response is amplified and down-converted into an IQ trajectory. An integration kernel compresses the time series into one IQ point, and a classifier labels it 0 or 1. For a three-qubit Toffoli experiment, the final classical dataset is a collection of bit-string counts over different inputs and repeated shots—not a direct view of \(\ket{a,b,y\oplus ab}\). Validation must include at least:

  1. Construct the conditional probability \(P(z_{\mathrm{out}}\mid z_{\mathrm{in}})\) for all eight basis inputs.
  2. Estimate readout-assignment error separately from gate error so that a classifier problem is not counted entirely as CCX error.
  3. Use a superposition input or a process-oriented test to check the phase action, because a truth table cannot reveal relative phase.
  4. Repeat the measurement over time to identify calibration drift instead of reporting only one best result.

5.5 Build an Executable Validation Ladder

If the complete CCX fails, the space of possible causes is too large. Engineering validation should proceed from small units to larger ones, establishing independent evidence at each layer. First verify the qubit spectrum, anharmonicity, \(T_1/T_2\), and readout assignment. Second calibrate single-qubit amplitude, DRAG parameters, and phase. Third calibrate every required two-qubit edge. Fourth test simultaneous operations and crosstalk. Only then execute the compiled CCX. Without a credible baseline at the previous layer, failure at the next layer cannot be assigned uniquely.

Tests at every layer should also distinguish three timescales: coherent dynamics within one pulse, calibration drift over minutes to hours, and device-state changes across days. A circuit succeeding in one hundred shots proves at most that the output can be generated at that moment. To become a reusable system capability, we must know how often recalibration is required, whether failures can be detected automatically, and whether calibration reconverges without manual plot selection.

Criteria for Moving from Demonstration to Capability

One attractive result is a demonstration. A specified, tested, budgeted, repeatable, and diagnosable procedure is closer to a deployable capability. This distinction will recur throughout the later discussion of complete quantum-computing systems.

Class Activity: Cross-Layer Fault Localization (6 minutes)

The experiment finds that for basis input \(110\), the fraction of output \(111\) is only 0.82, while most other inputs exceed 0.95. Propose one possible cause at each of the specification, compilation, control, device, and measurement layers, and specify a next experiment that can distinguish each cause. “The noise is large” is not an acceptable answer.

Instructor Reference Answer

  • Specification:The target-bit initialization or bit ordering is incorrect; compare the simulator output with the raw bit ordering.
  • Compilation:Routing or qubit mapping sends a critical CNOT through a poor-quality edge; fix the layout and compare different transpilation results.
  • Control:The amplitude or drift of a conditional-phase pulse is incorrect; run the corresponding pair's Ramsey or conditional-phase calibration.
  • Device:Leakage near \(\ket{11}\) or a particular avoided crossing; measure qutrit populations or use a leakage-sensitive measurement.
  • Measurement:Simultaneous readout assignment or crosstalk is especially poor for \(\ket{111}\); independently prepare all eight basis states and construct the full assignment matrix.

The point is not to guess one unique cause, but to turn the vague statement “the result is poor” into falsifiable, layer-specific hypotheses. This is one distinction between a quantum-hardware engineer and someone who only calls a circuit API.

Q6. How Do We Track Errors and Resources across Abstraction Layers?

A Cross-Layer Validation Framework

110–120 minutes

6. Synthesis: Read the Entire Course through One Matrix

The purpose of this week is not to memorize the history of reversible computing. It is to establish a matrix that can locate issues repeatedly throughout all sixteen weeks. Whenever a claim about quantum technology appears, first ask which layer it addresses, which interfaces it assumes, and where the cost has been moved.

LayerCore ObjectQuestion at This LayerCommon MisjudgmentObservable Evidence
Problem / semantics\(f(x)\)、cost function、sampling taskWhat exactly counts as the answer?Treating the problem definition as the execution methodCorrectness conditions and input/output specification
Reversible embedding\(U_f\)、ancilla、garbageHow is information preserved and temporary storage cleaned?Treating ancillas and uncomputation as freeregister contract、qubit count
Logical circuitunitary、gate、depthHow is the algorithm decomposed?Treating logical gate count as physical costlogical resources、error budget
Compilationnative gates、routing、scheduleHow does the implementation satisfy topology and the instruction set?Looking only at the abstract circuit diagramtwo-qubit depth、duration、mapping
DeviceEnergy levels, coupling, and \(H_0\)Which degrees of freedom can the device provide?Treating a qubit as an ideal two-level systemspectrum、coherence、leakage
Control\(u_k(t)\)、pulse、calibrationHow is the target propagator generated?Treating a gate symbol as a physical operationRabi/Ramsey、RB、drift data
MeasurementIQ record、POVM、classifierHow is a state converted into trustworthy data?Treating a readout bit as the actual stateassignment matrix、SNR、shots
Systemcryo、electronics、software stackCan the whole system remain stable, scale, and operate repeatedly?Using the best value of one component to represent the whole machineuptime、throughput、calibration overhead

Exit Ticket: Answer Independently before Class Ends

  1. Why is the functional universality of NAND insufficient to define quantum hardware directly?
  2. Which operation is constrained by the Landauer principle, and what does the principle not claim?
  3. Why is Bennett uncomputation more than an energy-saving technique in a quantum algorithm?
  4. Why does the computational equivalence of the gate and adiabatic models not imply identical hardware?
  5. After a CCX truth table succeeds, which two additional kinds of tests are needed before the CCX implementation is trustworthy?

Exit-Ticket Answer Guide

  1. NAND is many-to-one and cannot directly be unitary; moreover, a truth table specifies no Hamiltonian, control, or measurement.
  2. The principle gives the minimum entropy/heat cost of information erasure in an ideal isothermal limit. It does not say that every gate dissipates exactly \(k_BT\ln2\), and it is not a whole-machine power formula.
  3. If garbage remains entangled with the answer, it carries which-path information and damages interference. Ancillas must be restored before reuse and before a clean output state is obtained.
  4. The two models require different control degrees of freedom, primary resources, noise channels, minimum gaps, calibration procedures, and topologies.
  5. At minimum, a phase-sensitive or superposition test and a SPAM/readout characterization are required. Drift over time and leakage should also be examined.

Connection to the Next Week

Next week begins superconducting circuits. Students should carry forward this week's interface questions: a Josephson junction is not a “natural qubit gate”; it supplies nonlinearity. After deriving a quantized Hamiltonian from the junction and capacitor, one must still choose operating levels, coupling methods, a drive operator, a readout channel, and a calibration procedure. The logical-to-physical chain established this week will become concrete again in every later device topic.

Further Reading and Original Sources

  • R. Landauer, Irreversibility and Heat Generation in the Computing Process: the original discussion of information erasure and thermodynamic cost.
  • C. H. Bennett, Logical Reversibility of Computation: the classic source for reversible simulation and history cleanup.
  • D. Aharonov et al., Adiabatic Quantum Computation is Equivalent to Standard Quantum Computation: for understanding the scope and assumptions of model equivalence.
  • M. A. Nielsen and I. L. Chuang, Quantum Computation and Quantum Information: systematic background on reversible circuits, unitaries, measurement, and the circuit model.

Extended Foundations and Reference Modules

Optional Review and Self-Study Material

Advanced Throughline: Do Not Turn Week 1 into an Introduction to Quantum Information

This week assumes that students have already encountered kets, tensor products, and basic quantum gates. The class should not reteach every prerequisite; it should establish three descriptive layers:

  1. Computational semantics:inputs, outputs, computable functions, and complexity.
  2. Logical representation:reversible gates, unitary circuits, measurement, and classical feed-forward.
  3. Physical realization:the time-dependent Hamiltonian \(H(t)\), control pulses, and the measurement chain.

Landauer identifies the physical cost of “information erasure”; Bennett shows how a general computation can be rewritten as logically reversible by preserving history and applying uncomputation. The unitary evolution of quantum gates is therefore not merely a statement that “quantum mechanics is mysterious.” It is the intersection of information preservation, reversible dynamics, and implementable control.

\[\ket{\psi(t)}=\mathcal T\exp\!\left[-\frac{i}{\hbar}\int_0^t H(\tau)d\tau\right]\ket{\psi(0)}\]

Finally, compare the circuit model with the adiabatic/Hamiltonian model. They can be polynomially equivalent in computational power, but they expose different hardware control parameters, gaps, noise channels, and calibration problems.

2. Module 1: Classical Logic Gates and Boolean Computation

1.1 Classical Bits and Boolean Logic

Classical computation uses the bit as its most basic unit of information, and each bit can take only the value 0 or 1. At the hardware layer, these values usually correspond to high and low voltage, the presence or absence of charge, a magnetization direction, or another pair of stably distinguishable physical states. Boolean algebra allows complex logical operations to be decomposed into basic logic gates.

Core Concepts

  • Bit: the smallest unit of classical information.
  • Boolean algebra: represents logical false and true using 0 and 1.
  • Truth table: tabulates the correspondence between a logic gate's inputs and outputs.
  • Logic gate: a basic component that implements a Boolean operation.

Basic Logic Gates

Gate Input Output Functional Description
NOT A ¬A Changes 0 to 1 and 1 to 0.
AND A, B A ∧ B The output is 1 only when both inputs are 1.
OR A, B A ∨ B The output is 1 whenever either input is 1.
XOR A, B A ⊕ B The output is 1 when the two inputs differ.
NAND A, B ¬(A ∧ B) The inverted output of AND; a universal gate in classical logic.

1.2 Universal Classical Computation

In classical computation, NAND or NOR gates can provide universal computation. That is, any Boolean logic circuit can be composed from sufficiently many NAND gates or sufficiently many NOR gates. This idea is important for understanding universal quantum gate sets later.

Learning Check

  1. Why can NAND serve as a universal classical gate?
  2. Construct NOT, AND, and OR from NAND gates.
  3. What is the relationship between Boolean logic and a physical hardware circuit?

3. Module 2: Modern Computer Architecture and Models of Computation

2.1 Von Neumann Architecture

Most modern computers are based on the von Neumann architecture and consist primarily of a CPU, memory, input/output devices, and buses. Programs and data share memory, and the CPU executes instructions through a fetch–decode–execute cycle.

Main Components

  • CPU:Executes instructions and processes data.
  • ALU:Performs arithmetic and logical operations.
  • Register:High-speed storage registers inside the CPU.
  • Memory hierarchy:A hierarchy of memory with different speeds and capacities, including cache, RAM, and SSD/HDD storage.
  • Bus:Transmits data, addresses, and control signals.

2.2 From Classical Circuits to Computation

A classical logic gate by itself performs only a local logical operation. Large collections of gates form adders, multipliers, registers, control units, and memory systems, which in turn form the CPU and a complete modern computer architecture.

From the perspective of a model of computation, a classical computer can be understood as a state machine: at each step, the system moves from its current state to a next state according to the input. Most classical logical operations, however, are irreversible. The output of an AND gate, for example, does not uniquely determine its two inputs.

Connection to Quantum Computing

The closed evolution of a quantum system must be described by a unitary matrix, and unitary evolution is necessarily reversible. Building computation on quantum mechanics therefore requires us to reconsider whether computation itself can be performed reversibly.

4. Module 3: Reversible Computing

3.1 Irreversible Computation and Information Loss

Many gates in classical logic compress input information. An AND gate has four possible input pairs but only one output bit, so the input cannot be recovered uniquely from the output. This many-to-one mapping is called irreversible computation.

From a physical perspective, information loss and energy dissipation are deeply connected. Research on reversible computation shows that avoiding information loss can, in principle, reduce the heat dissipation caused by information erasure.

3.2 Reversible Gates

A reversible logic gate requires a one-to-one map between inputs and outputs, so the output must retain enough information to reconstruct the input. Common reversible gates include CNOT, Toffoli, and Fredkin gates.

Reversible Gate Action Importance
CNOT Flip the target bit when the control bit is 1. One of the most important two-qubit gates in quantum computing.
Toffoli Gate Flip the target bit when both control bits are 1. Can construct reversible classical computation; also called controlled-controlled-NOT.
Fredkin Gate Swap two target bits conditionally on the control bit. A representative example of reversible logic and conditional swapping.

3.3 Why Quantum Computing Must Be Reversible

In quantum mechanics, the time evolution of a closed system is described by a unitary operator. A unitary operator has an inverse, so quantum-state evolution must be mathematically reversible. A quantum gate therefore cannot compress multiple inputs into the same output as a classical AND gate does.

Learning Check

  1. Why is AND not a reversible logic gate?
  2. How does the Toffoli gate implement reversible classical computation?
  3. Why must a quantum-computing gate be represented by a unitary matrix?

5. Module 4: Quantum Mechanics as a Language of Computation

4.1 Quantum State and Hilbert Space

The basic unit of quantum information is the qubit. Unlike a classical bit, which can only be 0 or 1, a qubit can occupy a linear superposition of \(|0\rangle\) and \(|1\rangle\):

|ψ⟩ = α|0⟩ + β|1⟩

Here \(\alpha\) and \(\beta\) are complex amplitudes satisfying the normalization condition:

|α|² + |β|² = 1

This equation shows that a quantum state is not merely a probability distribution but a complex vector carrying phase information. Phase cannot be measured directly, yet it changes interference outcomes and is a central source of the power of quantum algorithms beyond classical intuition.

4.2 Superposition, Phase, and Interference

A superposition means that a quantum system has amplitudes on multiple basis states. It should not be reduced to the phrase “simultaneously 0 and 1.” More precisely, a qubit is a vector in Hilbert space, and \(|0\rangle\) and \(|1\rangle\) form a basis.

  • Superposition:A quantum state can be a linear combination of multiple basis states.
  • Relative phase:The relative phase between amplitudes affects interference.
  • Interference:Amplitudes can interfere constructively or destructively, changing measurement probabilities.
  • Measurement:Measurement projects the quantum state onto a chosen measurement basis.

4.3 Measurement and Born Rule

If the qubit is in \(|\psi\rangle=\alpha|0\rangle+\beta|1\rangle\), a measurement in the computational basis returns 0 with probability \(|\alpha|^2\) and 1 with probability \(|\beta|^2\). This is the Born rule.

Measurement differs from unitary evolution. Unitary evolution is continuous, linear, and reversible; measurement projects the quantum state onto a particular outcome and introduces probabilities. This distinction is essential for understanding quantum readout, quantum error correction, and quantum control.

4.4 Tensor Product and Multi-Qubit States

The state space of a multiqubit system is constructed by a tensor product. The basis for two qubits is:

|00⟩, |01⟩, |10⟩, |11⟩

A general two-qubit state can therefore be written as:

|ψ⟩ = c₀₀|00⟩ + c₀₁|01⟩ + c₁₀|10⟩ + c₁₁|11⟩

For \(n\) qubits, the state-space dimension is \(2^n\). This exponential growth is one source of quantum computation's expressive power, but it also makes control, simulation, and error correction exceptionally challenging.

6. Module 5: Quantum Gates and Gate-Based Quantum Computing

5.1 Quantum Gates as Unitary Operators

A quantum gate is a unitary operator acting on qubit states. A quantum circuit can be viewed as a sequence of unitary operations followed by a measurement that produces classical output.

Common Single-Qubit Gates

Gate Action Physical or Geometric Meaning
X gate |0⟩ ↔ |1⟩ Analogous to the classical NOT gate; a \(\pi\) rotation about the \(x\) axis of the Bloch sphere.
Y gate A bit flip with phase A \(\pi\) rotation about the \(y\) axis.
Z gate \(|1\rangle\) acquires a minus sign Changes relative phase; a \(\pi\) rotation about the \(z\) axis.
Hadamard gate Creates a superposition of \(|0\rangle\) and \(|1\rangle\) Converts the computational basis to a superposition basis.
S gate Applies a \(\pi/2\) phase. phase gate。
T gate Applies a \(\pi/4\) phase. Commonly used for universal quantum computation.
Rₓ, Rᵧ, Rᶻ Rotation about a Bloch-sphere axis Corresponds to continuous rotations in physical quantum control.

Common Two-Qubit Gates

Gate Action Importance
CNOT Flip the target qubit conditionally on the state of the control qubit. Can generate entanglement; a fundamental two-qubit gate in quantum circuits.
CZ Apply a minus sign when both qubits are in \(|1\rangle\). Common in superconducting quantum computing and closely related to the implementation of entangling gates.
SWAP Swap the states of two qubits. Used to reposition quantum information on a quantum chip with limited connectivity.

5.2 Universal Quantum Gate Set

Analogous to NAND in classical computation, quantum computation also has the concept of a universal gate set. A set of gates is universal if it can approximate any unitary operation. Common examples include:

  • Arbitrary single-qubit rotations plus one entangling two-qubit gate.
  • Clifford gates plus the T gate.
  • Combinations such as H, S, T, and CNOT.

5.3 Gate-Based Quantum Computing Model

Gate-based quantum computing represents computation as a quantum circuit. The workflow usually contains the following steps:

  1. Initialization:Prepare qubits in a known initial state such as \(|0\rangle\).
  2. Unitary evolution:Apply a sequence of quantum gates.
  3. Entanglement generation:Create quantum correlations through two-qubit gates.
  4. Measurement:Convert the quantum state into a classical bit string.
  5. Classical post-processing:Perform statistical analysis of the measurement outcomes.

Connection to Superconducting Quantum Chips

On a superconducting platform, single-qubit gates are usually implemented with microwave pulses, while two-qubit gates rely on qubit–qubit coupling, tunable couplers, or frequency control. Abstract quantum gates must therefore be translated into concrete microwave-control waveforms and chip-design parameters.

7. Module 6: Adiabatic Quantum Computing

6.1 From the Quantum Gate Model to Hamiltonian Evolution

Gate-based quantum computing represents computation as a discrete sequence of quantum gates. Adiabatic quantum computing takes a different view: computation is not assembled gate by gate but is carried out through slow variation of the system Hamiltonian.

In adiabatic quantum computing, the system begins in the ground state of an easily prepared initial Hamiltonian. The Hamiltonian then changes slowly into the problem Hamiltonian. If the evolution is sufficiently slow, the adiabatic theorem says that the system remains near the instantaneous ground state. Measuring the final system yields an answer encoded in the ground state of the problem Hamiltonian.

6.2 Basic Formulation

A common adiabatic evolution can be written as:

H(s) = (1 - s)H₀ + sHₚ, 0 ≤ s ≤ 1
  • H₀:The initial Hamiltonian, whose ground state is easy to prepare.
  • Hₚ:The problem Hamiltonian, whose ground state encodes the answer.
  • s:A parameter that varies slowly with time.
  • Energy gap:The energy gap between the ground and first excited states, which determines the required evolution time.

6.3 Gate-Based vs. Adiabatic Quantum Computing

Comparison Item Gate-Based Quantum Computing Adiabatic Quantum Computing
Computational Method Discrete quantum gates Continuous Hamiltonian evolution
Core Language Quantum circuit Energy landscape / Hamiltonian
Primary Challenges Gate fidelity、decoherence、crosstalk Minimum gap, evolution time, and noise
Typical Applications Quantum algorithms, quantum simulation, and quantum chemistry Optimization, quantum annealing, and ground-state search
Relation to Superconducting Platforms One of the mainstream models for superconducting transmon systems Related to superconducting flux qubits and quantum annealing

Learning Check

  1. What is the main difference between gate-based and adiabatic quantum computing?
  2. Why is the energy gap important in adiabatic computing?
  3. How does adiabatic quantum computing convert an optimization problem into a physical problem?

8. Module 7: From Abstract Quantum Computation to a Superconducting Quantum Chip

The final goal of this topic is to establish an important idea: quantum computation is not only a collection of mathematical quantum gates or algorithms; it must be realized in a concrete physical system. In superconducting quantum computing, qubits are artificial quantum systems constructed from circuit elements such as Josephson junctions, capacitors, inductors, and microwave resonators.

Later topics will progressively translate the abstract concepts of this topic into their physical counterparts on superconducting quantum chips:

Abstract Quantum-Computing Concept Corresponding Element on a Superconducting Quantum Chip
Qubit Superconducting qubits such as the transmon and fluxonium.
Quantum gate Microwave pulse、flux pulse、tunable coupling。
Hamiltonian A circuit Hamiltonian determined by capacitance, inductance, Josephson energy, and coupling terms.
Measurement A readout resonator and dispersive readout.
Decoherence \(T_1\) relaxation, \(T_2\) dephasing, material loss, and control noise.
Quantum error correction Surface code、ancilla qubits、syndrome measurement。

In-Class Synthesis and Assessment

Discussion Prompt:Choose one step of a quantum algorithm and express it separately as a logical operation, a unitary block, and a possible Hamiltonian/control realization.

Completion Criteria:Students must leave a checkable derivation, relation diagram, comparison table, or architecture decision, and be able to explain its physical assumptions and engineering costs.

Core and Further Reading

  • Irreversibility and Heat Generation in the Computing ProcessR. Landauer, IBM Journal of Research and Development 5, 183–191 (1961).The original argument connecting logical irreversibility to physical dissipation.
  • Logical Reversibility of ComputationC. H. Bennett, IBM Journal of Research and Development 17, 525–532 (1973).The original construction of reversible universal computation and uncomputation.
  • Adiabatic Quantum Computation is Equivalent to Standard Quantum ComputationD. Aharonov et al., SIAM Journal on Computing 37, 166–194 (2007).The computational equivalence of the circuit model and the Hamiltonian/adiabatic model.
  • A Quantum Engineer's Guide to Superconducting QubitsP. Krantz et al., Applied Physics Reviews 6, 021318 (2019).A core review of control, coherence, readout, and engineering parameters.
𝒊𝑁𝑆𝐼𝐺𝐻𝑇 𝒊ℏ
PHYS598500 · WEEK 1 From Quantum Computing Models to Hardware Operations · Manual Slides
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